We are seeking a Design for Test (DFT) Engineer to join our leading IC Design client based in Belgium.
Located not far from Brussels, our client undoubtedly belongs to the European top in the design of ICs. Over the past decade the company has grown to become the largest fab-independent IC design team in Europe, developing bespoke ASICs for clients in the medical, automotive, industrial, consumer and aerospace fields.
They now seek an experienced Design for Test (DFT) Engineer to join their expanding Digital Design team. Working as part of the digital team, your role will be to create, deploy and implement the DFT strategy and ATPG. You will provide training to the design team to educate them in new test flows, and your role will be crucial in maximising the efficiency of the design process for DFT deployment.
*A number of years' experience in Design for Test (DFT), scan insertion, scan compression and logic BIST
*Good knowledge of DFT techniques and ATPG
*A strong understanding of digital RTL design and verification
*Experience with DFT tools from Synopsys or Mentor or Cadence (DFT Compiler / DFT Max Logic BIST / Tetra Max / Tessent)
*Fluent language skills in English
This company has a very reputable name with an extremely bright future. If you are a skilled Digital IC Designer looking for a stimulating new ASIC design challenge with long-term career prospects in Belgium, apply today for more details. The company offers an attractive salary package, additional benefits, and has a fantastic team culture with many activities (even a company band!)
Contact Caroline @ IC Resources today for details.
Key skills: Digital, Design for Test, DFT, ATPG, IC, ASIC, RTL, scan, insertion, compression, BIST, Synopsys, Cadence, Mentor, Tessent, DFT Compiler, TetraMax, EDA, Design, integrated circuit, semiconductor, Belgium, job.