Digital SoC Design Engineer - RTL, Wireless, Bristol
This is an exciting opportunity for a Digital SoC Design Engineer to join an innovative company developing IP for the Wireless Communications industry, based in Bristol.
As part of the baseband IP team you will have the opportunity to work on some truly exciting technology destined to go places. The right candidate will be degree-qualified, with some prior experience already in Digital ASIC / SoC Design, and a keen interest to develop their career into the field of leading-edge wireless ICs.
Your role will include by not be limited to:
*Writing block level RTL, coding at RTL and System-C level from specification
*Block level verification
*Block level RTL synthesis, DFT checks, Timing Analysis and Logic Equivalence Checking
*Taking part in the chip level verification (building test-bench models and designing C/assembler tests)
*Taking part in the chip level signoff and chip bring up
*An excellent academic background, with a Masters or PhD in Electronics or similar
*At least a couple of years' prior experience in digital front-end RTL design and verification, with experience designing complex system IP
*Solid VHDL / Verilog coding skills
*Experience of wireless standards (3GPP, 4G, LTE) would be advantageous, although not a prerequisite
For more information or to apply please contact ASIC consultant Caroline Pye @ IC Resources.
Key skills: Digital, ASIC, Design, IC, SoC, system on chip, system-on-chip, FPGA, RTL, VHDL, Verilog, verification, implementation, integrated circuit, wireless, start up, communications, Semiconductor, Bristol, South West, UK.