A mid-level verification engineer with excellent functional verification skills (systemVerilog/UVM) is sought for a challenging and varied role involving the verification of world leading Image Signal Processor (ISP) IP cores. You will be working for a successful young company developing cutting-edge image enhancement technology for the latest range of digital cameras and mobile handsets in Leicestershire.
This role is critical to quality, in delivering synthesizable IP cores to multiple SoC manufacturers serving the camera and mobile devices markets. This is an opportunity for a skilled engineer who has the ability to plan and prioritise a demanding workload, working on their own initiative. A wide breadth of experience in verification methodologies is essential, as you will play a critical role in driving forward multiple verification processes.
The ideal candidate will have experience of system level verification in a commercial development environment and;
* A good knowledge of verification methodologies (UVM) as well as VHDL, Verilog and System Verilog
* Experience of low power design techniques, an understanding of good coding practice and the ability to review code
* Scripting experience using Perl, Python, tcl
* Tools knowledge - VCS, Cadence NC, Atrenta Spyglass, Modelsim
Any experience of debugging or FPGA, Synopsys DC and C, C++ is beneficial but not essential for this position.
This role will involve interfacing closely with the hardware team and algorithm engineers, so good communication skills and team working abilities are essential to this role, as well as the desire to push the boundaries of verification throughout the company.
Visa sponsorship can be provided for applicants currently in Europe.
This is a unique opportunity to join a rapidly expanding company offering fantastic career and skills development opportunities, as well as an exceptional salary and company benefits package.
If this sounds like your next career move then please contact Dave Dixon to apply or for further details.
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