A new opportunity for a Senior Digital Physical Design Engineer - based in Edinburgh, Scotland.
Our client, a globally successful IC Design company is looking for a Senior Digital Physical Design Engineer to join their expanding ASIC design centre in Edinburgh.
As the successful Physical Design Engineer, you will be responsible for all aspects of physical implementation from RTL to GDS, taking care of ASIC synthesis, timing constraints, power analysis, floor planning, Place & Route (P&R), timing closure and tapeout. You will interact closely across different functional groups, and have a strong technical influence.
*A university degree in Electronics / Computer Science or similar
*Proven experience in a Digital Physical / Backend Design
*Strong knowledge of the RTL-GDSII flow
*Experience using Cadence RTL compiler OR Synopsys Design Compiler / PrimeTime
This company is renowned for their excellent corporate culture and work-life balance, earning them a top position on the 'Great Place to Work' list. A competitive basic salary, together with annual bonus scheme, pension scheme, generous holiday allowance plus many other benefits are on offer.
For the right candidate, relocation assistance and visa sponsorship can be provided where necessary.
For details, please contact Caroline @ IC Resources.
This role is suitable for a Digital Physical Design Engineer with skills in: Digital backend design, physical design, layout, RTL, GDS, GDSII, SoC, EDA, IC, ASIC, Cadence, Synopsys, PrimeTime, Design Compiler, RTL Compiler, synthesis, tape out, timing, timing closure, STA, static timing analysis, Place & Route, P&R, PnR, routing, DFT, scan, floor plan, power analysis, Semiconductor, circuit design. Location: Edinburgh, Scotland, UK.