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Verification Engineer

Opportunity
Working as a part of a team, as a graduate engineer you will have some or all of the following responsibilities:

  • Block Level Specification
  • Design and Coding using VHDL
  • Verification
  • Synthesis

The successful candidate will have the unique opportunity to exercise their verification skills on cutting edge designs within the PowerVR Graphics group.

Target Capabilities and Skills 

​The successful candidate will have some of the following skills:

  • An excellent knowledge of digital design, including low power design
  • Experience of VHDL or Verilog 
  • An excellent knowledge of Verification (and Digital Design) techniques and methodologies
  • Verification planning
  • Low power design techniques and power aware verification
  • Formal verification techniques
  • Ability to determine module verification requirements from analysis of specifications 
  • Understanding and experience of UVM (or similar verification methodology)
  • System Verilog for verification (or similar verification language)
  • Proficient in writing assertions (SVA, PSL)​

Hertfordshire, South East England, South West England

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Job Details
  • Bristol or Kings Langley
  • Permanent
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