Verification Methodology Specialist - Cambridge
This is an exciting opportunity for an experienced Verification Engineer to join a global Semiconductor company in a newly created Verification Methodology Specialist role.
The role covers all aspects of verification methodology; you will own key methodology solutions; working within the verification team to gather requirements, understand existing and future challenges, develop novel solutions and deploy those solutions across the group.
*Extensive knowledge of SystemVerilog.
*Real-world experience of using UVM in a project environment.
*Exposure to EDA workflows for verification sign-off.
*Experience of developing scalable and reusable test bench architecture components.
*Strong communication and team working skills.
*Strong scripting skills with either Unix shells or Python/Perl.
A very attractive salary package will be offered to the successful candidate, together with stock, bonus, and comprehensive benefits.
Work permit sponsorship and relocation assistance can be provided where required.
Key words: ASIC, SOC, IP, Verification, Engineer, Methodology, SystemVerilog, OVM, UVM, Specman, Formal, Emulation, C, C++, Semiconductor, Cambridge, UK.