{"id":145987,"date":"2026-06-12T00:00:00","date_gmt":"2026-06-11T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/asic-design-engineer-472876\/"},"modified":"2026-08-15T22:07:34","modified_gmt":"2026-08-15T21:07:34","slug":"asic-design-engineer-472876","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/de\/jobs\/asic-design-engineer-472876\/","title":{"rendered":"ASIC Design Engineer"},"content":{"rendered":"<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>ASIC Design Engineer (Senior\/Staff\/Principal levels)<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">This is a fantastic opportunity to join a start-up who are just over 2 years old, as they make <strong>technological breakthroughs in security with a product line built on CHERI technology and RISC\u2011V cores. <\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">They have strong funding behind them and a leadership team made up of experts in processor design and formal methods as well as a CEO who brings over 30 years of semiconductor experience from world renown companies and start-ups. <strong>With huge growth plans across the Silicon Design team this is a fantastic time to join the business!<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">I am seeking an Engineer who has experience in the full ASIC flow.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">Ideally you will have experience in end-to-end ASIC development, from RTL through to GDSII, including synthesis, DFT, floorplanning, place and route, static timing analysis, and tapeout support. This is a hands-on technical role, ideal for someone with a deep understanding of digital design and physical implementation, and a passion for building cutting-edge silicon.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">Responsibilities<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Collaborates with cross-functional teams to define and implement ASIC architectures<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Designs and develops RTL code using SystemVerilog and Verilog<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Conducts design verification and ensures compliance with specifications<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Participates in the integration and testing of ASICs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contributes to the improvement of design methodologies and processes<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Intgrate IPs, define constraints, and ensure timing, area, and power goals are met<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Work closely with RTL, verification, and DFT teams to ensure robust handoffs and convergence<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">Qualifications<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Holds a Bachelor&#8217;s or Master&#8217;s degree in Electrical Engineering or related field<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Demonstrates a solid understanding of ASIC design principles and methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Proficient in SystemVerilog, Verilog, and RTL Design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Possesses familiarity with security-related applications and protocols, which is a plus<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Exhibits strong problem-solving skills and attention to detail <\/span><span style=\"font-family: Verdana;font-size: 14px\">Day-to-day<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Collaborating with other engineers and cross-functional teams to define project requirements<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Writing RTL code and conducting design verification<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Participating in design reviews and providing input to improve ASIC design methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contributing to the development of innovative solutions in the field of security<\/span><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>UK Based Start-Up offering company share options and a competitive base.&nbsp;<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Cambridge or UK Remote: You must be currently living and working in the UK and able to do so without restrictions.<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For more information, please contact Rachel Mason at IC Resources.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>ASIC Design Engineer (Senior\/Staff\/Principal levels) This is a fantastic opportunity to join a start-up who are just over 2 years old, as they make technological breakthroughs in security with a product line built on CHERI technology and RISC\u2011V cores. They have strong funding behind them and a leadership team made up of experts in processor [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[408],"industry":[],"class_list":["post-145987","jobs","type-jobs","status-publish","hentry","consultants-rachel-mason"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>ASIC Design Engineer - Remote<\/title>\n<meta name=\"description\" content=\"Apply to ASIC Design Engineer - UK, Remote. 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