{"id":220298,"date":"2026-09-14T00:00:00","date_gmt":"2026-09-13T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/digital-design-engineer-513688\/"},"modified":"2026-10-18T14:18:01","modified_gmt":"2026-10-18T13:18:01","slug":"digital-design-engineer-513688","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/de\/jobs\/digital-design-engineer-513688\/","title":{"rendered":"Digital Design Engineer"},"content":{"rendered":"<h1><span style=\"font-family: Verdana;font-size: 14px\">Digital Design Engineer \u2013 High-Speed Communications \/ ASIC<\/span><\/h1>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Lausanne, Switzerland | UK options available<\/strong><\/span><br \/><span style=\"font-family: Verdana;font-size: 14px\"><strong>CHF 120,000\u2013130,000 + benefits<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">What if the architecture wasn\u2019t already decided before you joined?<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">I\u2019m recruiting Digital Design Engineers for a small advanced semiconductor R&amp;D team exploring new approaches to high-speed communications silicon.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">This is not simply a role where you receive a finished specification and spend the next year implementing one RTL block.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The team is working on new digital and mixed-signal architectures, with the freedom to question existing approaches, investigate new ideas and help turn the strongest concepts into production silicon.<\/span><\/p>\n<h3><span style=\"font-family: Verdana;font-size: 14px\">What you\u2019ll work on<\/span><\/h3>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You\u2019ll contribute to the digital architecture and RTL development of advanced communications ICs, working closely with analog, architecture and wider design teams.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The work can include:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">RTL design and microarchitecture<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">High-speed digital design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">SerDes and high-speed interfaces<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Mixed-signal digital blocks<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Digital communications architectures<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Design exploration and architectural trade-offs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Taking new concepts from R&amp;D towards implementation in silicon<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The projects have a 2\u20134 year R&amp;D horizon, so there is genuine room to investigate new approaches rather than simply following an existing standard or product roadmap.<\/span><\/p>\n<h3><span style=\"font-family: Verdana;font-size: 14px\">Who they\u2019re looking for<\/span><\/h3>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You\u2019ll likely come from an ASIC \/ Digital IC Design background with strong RTL experience and exposure to at least some of the following:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">High-speed digital design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">SerDes<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Mixed-signal ICs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Communications silicon<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Advanced digital architectures<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You don\u2019t need to tick every box.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">More important is that you enjoy solving problems where the answer isn\u2019t already written in the specification.<\/span><\/p>\n<h3><span style=\"font-family: Verdana;font-size: 14px\">Why it\u2019s interesting<\/span><\/h3>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The team is deliberately small and collaborative.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You\u2019ll be working closely with experienced engineers, discussing ideas at architecture level, whiteboarding solutions and having considerably more influence over the direction of the design than you might get in a larger organisation.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The objective is also very clear: this is exploratory engineering intended to become real silicon, not research that disappears into a presentation deck.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The primary R&amp;D team is based in Lausanne, with engineers typically onsite around three days per week. There is also some location flexibility for the digital positions, including opportunities in the UK.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">If you\u2019re a Digital Design Engineer who enjoys asking \u201ccould we build this differently?\u201d, I\u2019d be very interested in speaking with you please contact Steph Hutchinson.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Digital Design Engineer \u2013 High-Speed Communications \/ ASIC Lausanne, Switzerland | UK options availableCHF 120,000\u2013130,000 + benefits What if the architecture wasn\u2019t already decided before you joined? I\u2019m recruiting Digital Design Engineers for a small advanced semiconductor R&amp;D team exploring new approaches to high-speed communications silicon. This is not simply a role where you receive [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[686,692],"consultants":[801],"industry":[],"class_list":["post-220298","jobs","type-jobs","status-publish","hentry","consultants-steph-hutchinson"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.6) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Digital Design Engineer - Switzerland<\/title>\n<meta name=\"description\" content=\"Apply to Digital Design Engineer - Lausanne, Switzerland. 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