Senior Digital Design Engineer \u2013 PCIe \/ CXL \/ RTL<\/p>\n
Location: Aix en Provence, France
Working Model: Hybrid, 3 days onsite \/ 2 days remote
Employment: Permanent, Full-Time<\/p>\n
An established global semiconductor company is looking for a Senior Digital Design Engineer to join its growing Silicon IP team in Aix-en-Provence.<\/p>\n
This is an opportunity to work on next-generation PCIe, CXL and AMBA controller IP, contributing to the architecture, microarchitecture and RTL implementation of high-performance connectivity solutions used in advanced computing and data centre applications.<\/p>\n
You’ll join an experienced international engineering team, working on technically challenging IP development projects with opportunities to contribute from initial architecture through to FPGA prototyping.<\/p>\n
Responsibilities<\/p>\n
Contribute to the architecture and microarchitecture of next-generation PCIe, CXL and AMBA controller IP.<\/p>\n
Develop and implement RTL using Verilog and SystemVerilog.<\/p>\n
Collaborate closely with verification engineers throughout the development lifecycle.<\/p>\n
Support FPGA prototyping and validation of new IP designs.<\/p>\n
Work alongside international design teams on advanced semiconductor technologies.<\/p>\n
Requirements<\/p>\n
5+ years of professional RTL design experience.<\/p>\n
Strong Verilog \/ SystemVerilog skills.<\/p>\n
Experience with digital IP design and microarchitecture.<\/p>\n
Master’s degree or PhD in Electrical Engineering, Computer Engineering or a related discipline.<\/p>\n
Good English communication skills.<\/p>\n
Experience with PCIe or CXL is highly desirable but not essential. Strong RTL designers with relevant IP development experience are encouraged to apply.<\/p>\n
What’s on Offer?<\/p>\n
Competitive salary plus performance bonus.<\/p>\n
Employee Stock Purchase Plan.<\/p>\n
Hybrid working with two days remote per week.<\/p>\n
Comprehensive family health insurance.<\/p>\n
Additional annual leave.<\/p>\n
Pension and savings benefits.<\/p>\n
Regular team lunches, breakfasts and a collaborative engineering environment.<\/p>\n
The opportunity to work on industry-leading connectivity IP within an established semiconductor business.<\/p>\n
If you’re an experienced RTL \/ ASIC Design Engineer looking to work on advanced PCIe and CXL technologies in the South of France, I’d be happy to share more details.<\/p>\n
Apply directly or get in touch for a confidential discussion.<\/p>\n","protected":false},"excerpt":{"rendered":"
Senior Digital Design Engineer \u2013 PCIe \/ CXL \/ RTL Location: Aix en Provence, FranceWorking Model: Hybrid, 3 days onsite \/ 2 days remoteEmployment: Permanent, Full-Time An established global semiconductor company is looking for a Senior Digital Design Engineer to join its growing Silicon IP team in Aix-en-Provence. This is an opportunity to work on […]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[801],"industry":[],"class_list":["post-246546","jobs","type-jobs","status-publish","hentry","consultants-steph-hutchinson"],"acf":[],"yoast_head":"\n