{"id":97386,"date":"2026-04-08T00:00:00","date_gmt":"2026-04-07T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-ic-layout-engineer-london-439775\/"},"modified":"2026-07-24T22:08:01","modified_gmt":"2026-07-24T21:08:01","slug":"senior-ic-layout-engineer-london-439775","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/de\/jobs\/senior-ic-layout-engineer-london-439775\/","title":{"rendered":"Senior IC Layout Engineer &#8211; London"},"content":{"rendered":"<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">This is a new opportunity for a Senior IC Layout Engineer to join a rapidly expanding deep-tech start-up company based in North London. Flexible working is available, ideally a minimum of 2 days a week in the office.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">This is a chance to work on something truly remarkable. Our client has developed the world\u2019s first CMOS silicon chip for quantum computing &#8211; their work will have an enormous impact on so many application areas. They now seek a Senior IC Layout Engineer to focus on the layout of analog and mixed-signal IP, capable of operating at cryogenic temperatures as well the layout and characterisation of qubits based on commercial CMOS processes.&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">The role will involve:<\/span><\/p>\n<ul>\n<li><span style=\"font-size: 14px;font-family: Verdana\">Hands-on block-level layout design and verification<\/span><\/li>\n<li><span style=\"font-size: 14px;font-family: Verdana\">Parasitic extraction and optimisation of layouts in close collaboration with the design team <\/span><\/li>\n<li><span style=\"font-size: 14px;font-family: Verdana\">Top -level floor-planning, routing and signoff<\/span><\/li>\n<li><span style=\"font-size: 14px;font-family: Verdana\">Providing tool\/flow support for analogue and layout design teams<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">We\u2019re looking for an experienced Analog IC Layout Engineer with:<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<ul style=\"margin-bottom: 0cm;margin-top: 0px\">\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Solid skills working within a Cadence environment<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Skills in Cadence Virtuoso Layout Suite (X)L including PCell Designer<\/span><\/li>\n<\/ul>\n<ul style=\"margin-top: 0cm;margin-bottom: 0cm\" type=\"disc\">\n<li style=\"margin-top: 0cm;margin-right: 0cm;margin-bottom: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Expertise in DRC, LVS, &amp; Parasitic Extraction with Mentor Calibre or Cadence PVS\/QRC<\/span><\/li>\n<li style=\"margin-top: 0cm;margin-right: 0cm;margin-bottom: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Demonstrated experience in deep sub-micron processes<\/span><\/li>\n<li style=\"margin-top: 0cm;margin-right: 0cm;margin-bottom: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Superb communication skills, with the passion and drive to contribute to an fast-moving start-up<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">A competitive basic salary is on offer together with benefits including company share package.&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">To learn more or to apply, please contact Caroline Pye @ IC Resources today. <\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This is a new opportunity for a Senior IC Layout Engineer to join a rapidly expanding deep-tech start-up company based in North London. Flexible working is available, ideally a minimum of 2 days a week in the office. &nbsp; This is a chance to work on something truly remarkable. Our client has developed the world\u2019s [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709,680],"job_skillset":[685],"consultants":[344],"industry":[],"class_list":["post-97386","jobs","type-jobs","status-publish","hentry","consultants-caroline-pye"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior IC Layout Engineer - London - England<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ic-resources.com\/de\/jobs\/senior-ic-layout-engineer-london-439775\/\" \/>\n<meta property=\"og:locale\" content=\"de_DE\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Senior IC Layout Engineer - London - England\" \/>\n<meta property=\"og:description\" content=\"Apply to Senior IC Layout Engineer - London - London, England. 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