ASIC Design Engineer, Australia

ASIC Design Engineer, Sydney

Job ID: 176913
Location: Australia
Salary: Relocation support is offered for this once in a life time opportunity! + excellent salary, stock options and health care
Job Type: Permanent
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Senior and Principal Digital Design Engineers - Sydney, Australia!

VC-backed start up with Stock options, fantastic company culture and huge growth! Sponsorship provided

This is a unique and life changing opportunity for 1 Senior and 1 Principal level ASIC Engineer to join one of Australia’s fastest growing semiconductor companies based in Sydney!

My client are a team of wireless experts that love to innovate and invent! Together, they are building the world’s lowest power Wi-Fi technology that will enable billions of IoT devices to connect securely to the internet.

For this role you will have a broad range of digital design and verification skills and strong industry experience in designing low-power mixed-signal SoCs. 

I am looking for an expert digital design and verification engineer with 7+ years’ experience (12+ for Principal) developing mixed-signal chips. Your responsibilities will include Chip and block-level design and verification, enhancement of design and verification infrastructure and Assisting with tapeout duties such as system verification, synthesis, gate level netlist simulations to validate design, power intent, and power analysis

Key skills
  • Digital design and verification experience with 7+ years (12+ for Principal) relevant industry experience
  • A deep understanding of digital design fundamentals including low power and multi-clock-domain design for mass-produced, mixed-signal chips.
  • Expert in mixed signal ASIC design and simulation, experience with AMS simulation is a plus
  • Very experienced with Cadence or Synopsys
  • Experience defining functional verification requirements, implementing tests to meet them
  • Expert in HDL languages such as Verilog, SystemVerilog or VHDL 
  • Experience running and debugging gate level simulations in post-PnR netlists with SDF annotation, power-aware simulation experience is a plus
  • A good understanding of embedded processor systems, familiarity with RISC-V is a plus
  • Experience writing embedded C
  • Hands-on experience with Linux development environment and scripting in Python.
I am keen to find someone who can make a real difference in a VC-backed startup and work in a dynamic & fun environment!  

As a company they have an excellent benefits package including stock option plan and competitive salary as well as relocation allowance, sponsorship for a European based engineer and great office perks!

Note: Ideally looking for European Nationals 

For more information and a confidential discussion please contact Rachel Mason at IC Resources - APPLY NOW!

+44 (0)118 988 1150

Book a call