Move to the South of France to join a global Semiconductor company in their Mixed-signal IP department as Analog IC Layout Engineer. In this position you can own a wide range of tasks from IP layout to top cell back-end management the microcontrollers/wireless families. Responsibilities:
Your profile /qualifications:
- Depending on your experience and aspirations, you will be in charge of the layout of blocks for domains like advanced power management (DC-DC, LDO,…), high accuracy reference & monitors (Bandgap & current reference, oscillators, POR,…) or analog & mixed signal processing (filters, amplifiers, ADC, DAC, (RF)PLL, RF LNA, …). From blocks to top cell view.
- You will be working in close partnership with analog designers and digital back-end teams in order to propose an optimal floorplan and layout in term of area, power & performance.
- You will be running the full set of back-end verification (DRC, LVS, …).
- You will advise on the best layout methodologies according to the requirements. You will participate in block layout and tape-out reviews.
- Opportunities for a skilled senior engineer to take the next step into leadership with remote layout teams.
- Experience in CMOS technologies and typical analog CMOS circuit layout techniques.
- Knowledge of EDA tool sets: Cadence Virtuoso, Mentor Calibre, …
- Fluent English & good communication skills to work in a multi-location & multicultural environment.
For more information and to apply please contact Ane@ IC Resources with your CV.