Digital IC Verification Engineer (UVM), France

Digital IC Verification Engineer (UVM), Aix En Provence

Job ID: 180311
Location: France, Europe
Salary: Attractive salary and benefits - dependent on experience.
Job Type: Permanent

This is a superb opportunity which not only offers exciting projects but also 60% remote working with flexibility on the days!

I am looking for a Mid-level or Senior Verification engineer to join my client based in Aix-en-Provence, France. You must be willing to work onsite 2 days per week (days are your choice) but you can be based anywhere in France!

My client are a global leader in data & security, developer and licensor of Semiconductor IP and specialise in high-speed interconnect and protocols such as PCI Express.

You will join the R&D team under the responsibility of the Director of Engineering and Verification Team Leader, where you will have responsibilities that include:
  • Define and implement verification plans and test plans to ensure the designs meet quality and performance goals
  • Build and maintain automated verification environments
  • Provide comprehensive documentation for the usage and the architecture of the verification environments as well as reports for the verification result
Skills Requirement
  • 3 + years in Design Verification
  • Experience in Verilog, System Verilog
  • Verification EDA tools, Verification methodologies, Verification IPs
  • Proficiency in programming and/or scripting languages (Python, Tcl, Perl, Cshel)
  • Background in digital circuitry or hardware logic design
  • High performance computing system, processor, cache coherency, chipset and ASICs
  • High speed interface protocols like PCIe, CCIX, CXL (advantage)
  • High performance memory interfaces (advantage)
  • Knowledge on High Speed Serdes and PHY PMA (advantage)
*Visa sponsorship can be offered if required*

For any queries please contact Rob Hudson – Senior Digital ASIC Design Recruitment Consultant




+44 (0)118 988 1150

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