Physical Design Engineer – Cambridge
I am looking for Physical Design Engineers of all levels to come and join my client at their Cambridge Technology centre. This unique opportunity will allow to work in a ‘start up’ environment giving you autonomy in your work whilst having the backing of a large company. You will be using the latest stimulations tools, working down to a variety of nodes across the full flow of digital design tasks. This role would best suit a Physical Design Engineer who already has some experience in Digital front end design or is interested in learning more about it.
Responsibilities would include:
- Setting up design frameworks for digital front-end (design) and backend (physical design) tasks
- RTL-level digital design and problem solving
- Run Logic Synthesis on RTL code including creating design timing constraints (SDC), optimisation techniques, Gate Level Simulation (GLS), etc.
- Designing and Implementing DFT strategies
- Outline the floor plan of the digital part of the ASIC and work closely with the chip layout lead.
- Run Place and Route on synthesised netlists applying optimisation techniques for APP (area, power, and performance), STA, IR Drop etc.
- Delivering all aspects of the digital IP for sign-off.
- Good understanding of digital theory
- Good understanding of digital interfaces such as I2C, SPI etc
- Strong RTL coding
- Verilog fluency in design, simulation, and verification domains
- Ability to master the full digital design flow (front-end to back-end)
- Minimum of 3 years industry experience
My client also offers a competitive salary, bonus scheme, flexible working as well as various other benefits.
For more information on this role or others then please contact Jordan Browne at IC Resources.