An opportunity has become available for a Test & Validation Engineer to join a leading developer of SoC FPGAs based in Paris.
As a Test & Validation Engineer you will have a number of responsibilities that include;
- Evaluation of chip on bringup board
- Verification of elementary units
- Software and Hardware debug
- Performance analysis (power consumption, frequency, temperature behavior, others limitations)
- Creation of validation reports
- Database management
To be considered for the Test & Validation Engineer vacancy you must have prior experience in a chip testing/lab debug environment, hands on experience with measurement devices and knowledge of FPGA, Verilog, VHDL and Python. Knowledge of GIT is an advantage.
If you have interest in applying to the Test & Validation Engineer vacancy or would like further information, please contact Roberta Wright.