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Verification Engineer, Cambridgeshire


Verification Engineer, Cambridge


Job ID: 176915
Location: Cambridgeshire, England, UK
Salary: Dependent on experience
Job Type: Permanent


NEW UK Design Centre for a fabless semiconductor company who are VC backed, are a high growth company and are building next generation Wi-Fi chips that will truly enable the Internet of Things! 

This is a superb opportunity to join my client who are in an exciting period of growth having recently landed in the UK and have now secured offices in Cambridge! 

I am looking for a Principal/Staff/Tech Lead Verification Engineer to join! Your role will be within the digital team and involve design and verification of their chips. The ideal candidate will be very experienced in both design and verification of mixed signal chips. You will need to be experienced with designing and verifying complex, mixed-signal SoCs and you will be responsible for the design, development, and verification of digital subsystems within their chips. 

Responsibilities include:
  • Chip and block-level design verification
  • Enhancement of their verification infrastructure and methods
  • Support of chip team’s verification efforts through to tapeout
  • Planning, tracking and documentation of verification throughout chip development project
  • Delivery of large complex projects on time
  • Running lint checks
  • Mentoring of junior team members
  • Providing overall technical expertise and brilliance
What I am looking for:
  • At least 12+ years relevant industry experience
  • MSc in Electrical / Electronics / Communication Engineering or Computer Science
  • A deep understanding of digital design verification fundamentals including low power and multi-clock-domain design for mass-produced, mixed-signal chips
  • Expert in digital simulation, some experience with design and AMS simulation
  • Very experienced with the Cadence or Synopsys simulation suites
  • Experience with coverage collection tools
  • Experience defining functional verification requirements, implementing tests to meet them
  • Expert in HDL languages such as Verilog, SystemVerilog or VHDL 
  • Experience with building complex testbench infrastructures
  • Experience running and debugging gate level simulations in post-PnR netlists with SDF annotation, power-aware simulation experience is a plus
  • A good understanding of embedded processor systems, familiarity with RISC-V is a plus
  • Experience writing embedded C and structuring code.
My client are full of fun, energy, huge experience in this area and are looking for Engineers to be onsite most days in Cambridge. It is vital that you want to be in the office and be instrumental in creating a new UK culture with all the fun, perks and joy of their original culture which makes them so unique! 

Please note: You must be a UK based candidate to be considered for the role and willing to relocate and live in Cambridge. 

For more information on the role, the package and the UK growth plans please contact Rachel Mason at IC Resources


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