ASIC Verification Engineer

I am seeking Design Verification Engineers from graduates through to Principals for a brand new UK based design team based in Cambridge. 

You will join an established Semiconductor company who are also a leader in their field as they embark on huge growth and office relocation (towards central Cambridge). I am seeking Verification Engineers who may be pure HW based and skilled in UVM as well as more SW orientated Verification Engineers who may be more versed in Python and C/C++.

You will have experience in RTL verification activities. An engineer who can: define verification strategies and methodologies for projects, plan, coordinate, and lead verification resources; efficiently utilize System Verilog and UVM for test environment and VIP development; and guide, teach and support less experienced verification engineers in debugging our FPGA SoC or IP designs.

Any experience with the following would also be a bonus;

• CPU
• AMBA/AXI protocols
• Memory controllers
• bus/cache
• Formal verification techniques

If you would like a more information and a confidential discussion please contact Rachel Mason at IC Resources.