Digital ASIC Design Engineer - Power Analysis

Physical Design Engineer - Power Analysis

Cambridge

I am seeking an experienced Physical Design Engineer with power analysis experience to join a dynamic team driving innovation in next-generation, high-performance, low-power ASIC designs. This is a fantastic opportunity to contribute to cutting-edge technology development across mobile, AI and other product areas, with a focus on advanced process nodes.

This role is ideal for Physical Design Engineer passionate about optimising power efficiency and delivering exceptional results in ASIC development. Join a team where your expertise will directly contribute to advancements in state-of-the-art technology.

Required Experience

• Bachelors or Masters in Electronic Engineer or a related field
• Proven experience in 4+ successful tapeouts
• Strong understanding of low-power, high-performance ASIC/SoC design flows, including micro-architecture, RTL design, verification, synthesis, timing/STA, UPF, CLP, LEC formal verification, DFT, and physical design.
• Hands-on expertise in power analysis, estimation, and optimisation using tools like PTPX and PowerArtist.
• Extensive knowledge of high-performance, low-power ASIC/SoC design.
• Proficiency in scripting for automation and data analysis (shell, Perl, Tcl, Python, etc.).

For more information on this role or others then please contact Jordan Browne at IC Resources.