Digital Design Chip Lead - (digital - AMS - SOC
Remote - UK, UK
Permanent
£100-130k + (dependent on experience)
V-200134
Rob Hudson
ASIC | Verification
Brand new, and cutting edge AI project, working for an exciting US start-up in the semiconductor space - to be based full-time within the UK.
Salary is negotiable - (based on seniority and relevance of experience) - circa £100-130k (or higher)
I am looking for a chip design lead to be responsible for the end to end design, set-up, micro-architecture definition, definition of the whole process & design flow and RTL design of a new AI project, based on neural networks technology.
You will be the lead designer, with duties including team leadership / management of a small team in charge of delivering the full chip to delivery at the fab.
Must have experience:
Apply now
Salary is negotiable - (based on seniority and relevance of experience) - circa £100-130k (or higher)
I am looking for a chip design lead to be responsible for the end to end design, set-up, micro-architecture definition, definition of the whole process & design flow and RTL design of a new AI project, based on neural networks technology.
You will be the lead designer, with duties including team leadership / management of a small team in charge of delivering the full chip to delivery at the fab.
Must have experience:
- Degree / Masters / PhD in electronics / micro-electronics, physics or similar field
- 10-20 years' experience of full chip design and delivery
- Tech lead / team leadership / team management
- Digital / AMS, analog-mixed-signal IP, chips and SOCs
- ASIC & FPGA - verilog, system verilog, VHDL
- ADC / DAC - digital - analog interfaces
- Functional verification - system verilog - IP, system, sub-system, block, top level experience
- Creation of test-benches
- detailed knowledge of complex tape-out processes, and interactions with fabrication plants
- Full digital design flow, from RTL2GDS
- SOC design, integration, system design, system architecture
- power management / PMIC / ultra-low power / optimisation & performance
- synthesis / HLS / STA
- physical implementation / physical design
- CPU / GPU / RISC-V design and architecture
- TPU / VPU / FPU - tensor, vector or floating point processor units
- HW, hardware accelerators
- PLLs / filter design
- RF-SOC
- DSP, signal processing
- Flash memory - DDR / HBM / high-bandwith memory / cache chorency
- clock, timing constraints
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