Digital Design / Verification Engineer (RISC-V)
Switzerland, Europe
Permanent
120-150k CHF
V-199130
Rob Hudson
ASIC | Verification
Exciting new position available with a cutting-edge semiconductor company, located in the Zurich area of Switzerland.
The ideal candidate will have a mixture of digital design and digital verification experience over the last 5+ years.
Apply now
The ideal candidate will have a mixture of digital design and digital verification experience over the last 5+ years.
- Bachelor/Masters/PHD in Electronic Engineering or similar field
- ASIC / FPGA digital design knowledge of complex tape-out projects (verilog /VHDL)
- Detailed understanding of UVM environments and RTL coding in verilog / system verilog
- Must have good scripting skills too - python, matlab, system C/C++
- Additional "nice to have skills" include knowledge of the full digital design flow, from architecture to RTL-GDS2 physical design / implementation / synthesis.
Related roles
Search all our jobsSenior Digital Design Engineer (ASIC IP)
South Holland, Netherlands
Permanent
€65-95k, bonus & RSUs (dependent on experience)
Read more
Senior SOC Design Architect
Midlothian, Scotland
Permanent
€100k and above (dependent on experience), bonus, stocks, excellent package.
Read more
Senior Digital Design / Architect (IP Security)
South Holland, Netherlands
Permanent
€75-95k + bonus + RSUs
Read more