Digital RTL Design Engineer

We are seeking a skilled Digital RTL Design Engineer with a solid background in CPU development to join our exciting AI hardware client, based in Austin and Santa Clara.

With already a great reputation in the market, our client is developing ultra-high performance RISC-V processors to address AI applications at large. They are a computing company with an impressive roadmap and a VERY promising future, comprised of a truly world-class team of AI and CPU Engineers.

The Digital RTL Design Engineer will focus on block development for high-performance CPUs that have been developed from scratch, based on RISC-V ISA. RTL coding (in Verilog) and microarchitecture will be a key focus of the role, as will improving power, performance and area of the design, driving experiments with RTL and evaluating synthesis, timing and power results in order to build the best AI platform possible.

Successful candidates will have:

• A BSc / MSc / PhD in Electronics Engineering or related field
• Several years' experience within Digital ASIC / SoC Design, with expertise within RTL coding with Verilog / VHDL
• A solid understanding of high-performance CPU microarchitecture
• Previous experience working on an x86, ARM or RISCV based CPU 
• Expertise in microarchitecture definition and specification development 
• Eligibility to work within the US, either with a US passport or Green card

On offer is a highly competitive compensation package and benefits. For details, contact Caroline Pye.