Digital Verification Engineer

Cambridgeshire, England


On offer is a highly competitive compensation package & benefits.


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Digital Verification Engineer

Cambridge/UK remote - All seniorities welcome.

I am seeking a skilled Design Verification Engineer to join my client who are leading the industry on cutting-edge AI technology.

As the successful Design Verification Engineer, you will join a team of technologists who have developed a high-performance RISC-V CPU from scratch and share a passion for AI and a deep desire to build the best AI platform possible. They are a computing company with an impressive roadmap and a VERY promising future, comprised of a truly world-class team of AI and CPU Engineers.

  • Verification of digital IP and SOC logic, using advanced verification methodologies - UVM, FPGA prototyping, emulation.
  • Creation of test plans.
  • Writing testbenches.
  • Creating functional coverage points.
  • Reviewing verification results and metrics and, driving the verification convergence towards tape-out.
  • Performance and power verification and validation of company IP and SOC.
Experience & Qualifications:
  • Circa 6 years of experience in hardware verification languages (SystemVerilog, SystemC)
  • Experience with UVM and coverage driven constrained random verification.
  • Experience with Low power verification techniques.
  • Excellent programming skills. C/C++ as well as scripting languages (Perl, tcl)
This role is based in the UK and you must have UK working rights to be eligible for the position. The role can be based in Cambridge or remotely from with the United Kingdom.

On offer is a highly competitive compensation package and benefits.

For more information and a confidential discussion, please contact Rachel Mason.