Digital Verification Engineer

Dornbirn, Austria


Depending on experience


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A successful Semiconductor company and design house is looking for a Digital Verification Engineer for their design team in Austria! If you want to work on exciting and always varied projects.

Your responsibilities will include:
  • Experience in building verification environments using UVM methodology
  • Execute the pre-silicon verification of digital and/or mixed-signal products
  • Create verification plans using datasheets, inputs from engineers / customers, and working closely with systems engineers
  • Implement automatic checks and measurements to verify behaviour and populate a Specification Matrix
  • Define and implement functional coverage and drive coverage closure
  • Provide periodic updates on DV status to project participants, management, and customers.
  • Bug tracking, functional coverage, RTL code coverage
Requirements profile
  • Bachelor or Master degree or equivalent in electrical engineering or physics
  • 7+ years of professional experience in Digital Verification
  • Advanced verification methodologies such as UVM
  • Development of testbench concept and testbench architecture
  • Knowledge of Verification Languages (e.g. SystemVerilog, Specman-e)
  • Experience with CAD tools and methods
For more information and an initial conversation, please contact Ane with your CV and let me know when you are free for a call!