Graduate digital IC design engineer (ASIC / FPGA)
Eindhoven, Netherlands
Permanent
Graduate level salary, bonus, RSUs - dependent on degree and relevant skills
V-196942
Rob Hudson
ASIC | Verification
Graduate / intern level Hardware / Digital design position available in the world on semiconductor security IP.
Salary, bonus, RSUs given. Plus visa sponsorship is available - dependent on degree studies and relevance of skills.
Requirements:
Apply now
Salary, bonus, RSUs given. Plus visa sponsorship is available - dependent on degree studies and relevance of skills.
Requirements:
- Bachelors / Masters / PHD in Electronics, micro-electronics or similar physics related field
- Understanding of / university module studies in: ASIC / FPGA digital design - writing RTL code in Verliog / VHDL
- Security IP / cryptography
- Understanding of SOC and IP level design
- Understanding of the whole digital design flow - RTL-GDS2
- Understanding of UVM and system verilog verification processes
- embedded hardware, systems, firmware
- coding / scripting in python, C++, system C, TcL, bash, perl, Rust etc.
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