IC Layout Engineer

My client is looking for an IC Layout R&D Engineer to support IC layout and CAD automation for cutting-edge semiconductor projects.

Responsibilities will include, but are not limited to:

• Manage and support EDA back-end analog tools (Cadence, Siemens) and design flows.
• Execute IC layout tasks for integration and tape-out.
• Develop automation solutions to enhance design efficiency.
• Validate process design kits (PDKs) and maintain CAD libraries.
• Support IC layout outsourcing and ensure adherence to design standards.

I am looking for a candidate with experience in some of the following areas:

• Hands-on experience in IC layout, including LVS, DRC, and ERC verification.
• Knowledge of advanced CMOS processes
• Proficiency in Linux, scripting languages (Python, bash, Skill), and version control tools (e.g., SVN).
• Strong problem-solving skills and a collaborative mindset.

This position is open to applicants who have the right to work in Switzerland, including EU and UK nationals.

If you’re an experienced IC Layout Engineer with CAD experience, then please contact Parm Shergill for more information.