
Physical Design Engineer
Hanover, Lower Saxony,
Eindhoven, Netherlands
Permanent
Competitive base salary and other benefits
V-188393
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Jordan Browne
ASIC, Verification
Physical Design Engineer - Eindhoven or Hannover
Our hugely successful fabless ASIC Design client based in Germany and the Netherlands is seeking an experienced Physical Design Engineer to join their expanding ASIC team.
This company’s vast experience in developing complex multiprocessor System-on-Chip products has earned them a superb reputation as a leading name in industry. As part of ambitious growth plans for several international sites, they are seeking a first-rate Physical Design Engineer to join their design centre in Hamburg. You’ll be working in a fast-paced environment on challenging chip products, based on the most advanced silicon technologies.
Our client is looking for the best Physical Design Engineers to be based in Hannover or Eindhoven, and in return offers the level of challenge and immense career satisfaction that goes with it.
Requirements:
Our hugely successful fabless ASIC Design client based in Germany and the Netherlands is seeking an experienced Physical Design Engineer to join their expanding ASIC team.
This company’s vast experience in developing complex multiprocessor System-on-Chip products has earned them a superb reputation as a leading name in industry. As part of ambitious growth plans for several international sites, they are seeking a first-rate Physical Design Engineer to join their design centre in Hamburg. You’ll be working in a fast-paced environment on challenging chip products, based on the most advanced silicon technologies.
Our client is looking for the best Physical Design Engineers to be based in Hannover or Eindhoven, and in return offers the level of challenge and immense career satisfaction that goes with it.
Requirements:
- A good academic record with a 1st or 2:1 in Electronics or a related field
- Knowledge of entire PD flow from netlist to GDS (Floorplanning, Power planning, Placement & Optimization, CTS, Routing, Post route optimization and DRC closure).
- Experience in logic synthesis, conformal, static timing analysis and Place and Route (PnR)

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