Physical Design Engineer

I am looking for an experienced Physical Design Engineer to come and join my client at any one of their four sites. This client is an established start-up who already have several sites across the globe and are looking for some experienced Physical Design Engineers to come and join the team at one of these locations. They specialise on high-speed bus transfer in wireless communications and are already challenging established tech giants within the industry.

Requirements:

• Bachelors or Master of Engineering in Electronics or Electrical Engineering
• Good understanding of RTL To GDS implementation flow
• Experience in a technical leadership role
• Experience working at 28nm, 16nm, 14nm or 7nm process nodes
• Experience in TCL, Shell, Python etc
• Experience in tape out procedures
• Expertise in Timing constraints and STA
• Experience in DFT methodologies
• Experience with Cadence Genus and Innovus

Responsibilities would include:

• Timing Constraints development, timing constraints validation, signoff Static Timing Analysis and full chip & block-level timing closure
• Synthesis, floor-panning, place & route, clock tree synthesis, physical verification
• Work closely with the other teams in the business

This client also has sites in Germany and the UK and are happy for Engineers to work from any of these sites as well.

For more information on this role or others then please contact Jordan Browne at IC Resources – 01189073075.