Principal IC Verification Engineer (ASIC / FPGA)
North Holland, Amsterdam, South Holland, Rotterdam, Utrecht, Netherlands
Permanent
€70-90k + company benefits
V-198531
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Rob Hudson
ASIC | Design | Architecture | Management UK/EU
Working for a cutting edge company, focusing on a complex processor for quantum computing technology.
This is a brilliant opportunity for a senior verification engineer to join them.
As Principal / Lead Verification Engineer, you will be tasked with leading ASIC / FPGA verification duties, and developing the UVM environment.
Must-have experience:
*Visa sponsorship is available
This is a brilliant opportunity for a senior verification engineer to join them.
As Principal / Lead Verification Engineer, you will be tasked with leading ASIC / FPGA verification duties, and developing the UVM environment.
Must-have experience:
- Circa 10 years' experience in digital or AMS verification
- VHDL / SystemVerilog
- RTL design / coding
- ASIC / FPGA digital verification knowledge
- Tcl / Python or similar coding / scripting
- UVM
- Previous experience setting up or developing a UVM environment.
- embedded software
- DevOps / software automation / CI/CD
- Other verification packages (e.g. OVM, OSVVM, Cocotb)
- Formal verification
*Visa sponsorship is available
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