
Principal/Lead AMS Verification Engineer
Midlothian, Scotland
Permanent
£75k - £90k plus bonus and RSUs
V-188714

Leon Morrison
Analog, Mixed Signal and RF IC Design
An opportunity has arisen for an experienced AMS Verification Engineer to join a successful design centre in the popular and scenic city of Edinburgh, working alongside some of the worlds leading engineers in Analog/Mixed Signal IC design.
In this role you will be working at a Lead/Principal level for Chip-level Advanced Mixed Signal (AMS) Verification of primarily power management devices. The role will include integration of Analog, Digital and Mixed-Signal IP blocks at top-level.
Other tasks will include:
To apply today for immediate consideration, please contact Leon.
Apply now
In this role you will be working at a Lead/Principal level for Chip-level Advanced Mixed Signal (AMS) Verification of primarily power management devices. The role will include integration of Analog, Digital and Mixed-Signal IP blocks at top-level.
Other tasks will include:
- Verification of mixed-mode top-level designs
- Modelling of Analog and Mixed-Signal circuits
- Planning and coordination of AMS Verification tasks
- Top-level design AMS configuration creation
- Support and maintenance of Analog core blocks such as oscillators, references
- Support of Analog block level design engineers with AMS setup and simulations
- Lab evaluation and support for circuit blocks/whole ICs
- Support DFT strategy and Verification
- Support test development and ramp to production
- Instigate regular peer reviews with Analog design engineers.
- Mentor Verification team and provide technical support for Verification activities
- Modelling languages such as Verilog or VHDL RTL Coding and experience with UNIX shell Perl and TCL scripting
- System Verilog for verification using advanced verification methodologies (preferably UVM or similar such as Specman-e, OVM, SystemC, etc.)
- Assertion based verification and Formal verification
- Expert in constrained random verification and metric driven verification
- Expert in simulation and regressions tools e.g. Cadence Incisive, vManager, IMC
- Familiar with either Verilog or VHDL RTL coding and ASIC design methodology
- Familiar with behavioral modelling of analog blocks
- Proven experience in writing verification plans and test bench development, simulation and debugging
To apply today for immediate consideration, please contact Leon.

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