Principal SOC Architect (ASIC, R&D)

Working for a cutting-edge semiconductor company, I am looking to recruit a high-level SOC architect for fascinating and brand-new project work.

The position is available from Senior Staff to Principal level - as long as applicants can demonstrate significant experience of full chip definition and delivery.

Over £100k+, with excellent package and benefits.

Based in Cambridgeshire, you will be tasked with the end to end SOC architecture of new chips for brand new products in the market.

Key skills / requirements:

• BSc / MSc / PhD in Micro-electronics, physics, or similar filed
• 10+ years' experience in complex SOCs
• Deep understanding of MCUs Subsystems, Memory Controllers, and memory architectures (e.g., SRAM, ROM, eFuse).
• Extensive experience with the Digital ASIC Flow, RTL design, and Debug methodologies (e.g., DFT, JTAG, Scan, BIST).
• Extensive knowledge of SOC architecture, set-up / silicon bring-up, validation and all it's associated processes.
• SOC design, system design, system architecture
• IP selection & integration
• SOC performance & modelling e.g. UML
• SOC interconnect protocols - AXI, AMBA, AHB, APB, OCP, STBus, DTL
• DSP / signal processing / communication protocols
• Digital-AMS chip development - digital to analog interfaces
• low-power, performance and optimisation
• low level software, firmware and embedded requirements - drivers, controllers etc.