Senior Digital Design Engineer (ASIC / NOC / SOC)

Exciting opportunity as Senior Digital IC Design Engineer to join the world leader in network-on-chip interconnect technology integration and deployment for SoCs. 

Located in offices to the west of Paris, my client provides semiconductor intellectual property (IP) for some of the best known brands in the world - covering a wide range of applications from AI to cars, mobile phones, IoT, cameras, and SSD controllers. 

As Senior Digital IC Design Engineer, your key task will be to create IPs for customer specifications, working closely with the verification team to resolve any issues. 

Key responsibilities:

• Write micro-architecture specification for highly configurable IPs
• Develop or upgrade IPs RTL description with performance, power, area goals
• Communicate with Software, Modeling and Documentation teams about your changes to ensure product cohesion
• Help improve and refine processes, methodologies, and metrics

Experience requirements / qualifications:

• 5+ years of industry experience as an RTL Design Engineer - ASIC / SOC / FPGA
• Knowledge of Verilog or SystemVerilog.
• Knowledge of interconnect technology is a plus
• Knowledge of Cache architecture is a plus.
• Knowledge of AMBA protocols, ARM/MIPS processors, on-chip interfaces such as OCP & AXI
• Experience with C / C++ or Python or JavaScript is a plus.
• Good written and verbal communication skills in both French and English
• Positive attitude and approach to the work

Education requirements:

• Engineering Master's Degree

To learn more, or apply, please contact Lucy Edmondson @ IC Resources.