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Senior Digital Security IP Design Engineer (ASIC / FPGA)

South Holland, Rotterdam, Netherlands

Permanent

€65-85k (dependent on experience) + excellent package: bonus & stocks

V-190166

My client are a global leader in data & security, development and licensor of Semiconductor IP, and I am recruiting for a Senior Digital Security IP Design Engineer.

As Senior Digital Security IP Design Engineer; you will be working closely with other ASIC engineers and architects, as well as security, cryptography, verification and software engineers to architect, design, implement, and integrate the latest solutions for digital hardware in the security market, including crypto and Post-Quantum cores.

Experience/Skills
  • MS/PhD degree in electrical or computer engineering required, (PhD preferred)
  • Professional experience of working in secure hardware/IC design, or PhD / research related study
  • Design and implementation of efficient cryptographic algorithms that implement side channel analysis countermeasures
  • Knowledge of HW security architectures and IPs (secure MCU cores, cryptographic co-processors, secure memories, secure elements, smart cards)
  • Familiarity with front-end ASIC design flows, including design, simulation, assertions, formal verification, synthesis, timing analysis, logical equivalence checking, and linting/rule checking. Experience with back-end flows, especially place-and-route, is beneficial.
  • Proven track record of on-time delivery of silicon-proven designs.
  • Demonstrated proficiency in Verilog and digital design.
Expertise in some or all of the following areas is beneficial:
  • Secure hardware design
  • Data processing (DPA), data security
  • Route of Trust (RoT)
  • Cryptographic algorithms and side-channel attacks
  • High performance CPU architecture and design.
  • IP core delivery and handoff issues.
  • Modern SoC design methodologies and architectures.
  • Low-power design techniques.
  • Clock and reset domain crossing techniques.
  • DFT, especially memory testing and characterisation and/or Logic BIST methodologies.
  • Manufacturing test, device characterisation and qualification, JTAG, reliability testingHardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts
  • Ability to work with technical writers in the production of technical documentation.
Tools/Technologies
  • Verilog, SystemVerilog, Perl
  • Shell scripting, Python, Sage, Tcl
  • C, C++
  • MATLAB, Xilinx Vivado
  • Unix, Linux
  • Front-end ASIC design tools - synopsys/cadence/mentor

Excellent salary, bonus, stocks/shares, visa sponsorship and relocation bonus are all available for this fantastic opportunity with a fantastic employer.

For more information please apply with your CV and request a conversation today!
Apply now
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