
Senior Digital Verification Engineer (ASIC / UVM)
Lombardy, Milan, Italy
Permanent
€40-70k (dependent on experience)
V-189743

Rob Hudson
ASIC, Verification
Working for a global player in the semiconductor industry, my client is a US based company who are looking to grow their UVM digital IC verification engineering department.
Required skills:
Apply now
Required skills:
- I am looking to speak to engineers with 3-5+ years' industry experience
- Degree in Electronics/microelectronics, or similar field
- 3-5+ years' industry experience
- Excellent knowledge of UVM verification, IP verification, system verilog
- UVM environments - set up test benches etc
- Knowledge of analog / mixed-signal environments is a bonus
- Fluent English / Italian skills

Related roles
Search all our jobsSenior RTL Design Engineer (ASIC / FPGA / SOC)
Paris, Île-de-France
Permanent
salary dependent on level of experience
Read more
Senior Digital IC Verification Engineer - AI / UVM (remote)
South Holland, The Hague, Netherlands
Permanent
€60-80k (dependent on experience)
Read more
RTL Verification Lead Engineer - FPGA / UVM
Utrecht, Netherlands
Permanent
€60-80k depending on experience
Read more