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Verification Engineer Lead

Midlothian, Scotland


Share options + base £75,000 - £90,000 (depending on experience)


Verification Team Lead (ASIC/FPGA)


Verification Team Lead currently? Want to lead an FPGA Verification group? Want to work for the 1st and only company going straight from broadband to mobile? Want to work for a company partnered with some of the world’s largest telecoms companies? This could be IT for you!

The Lead Verification Engineer is responsible for technical coordination of the Verification team to make sure a design complies with System Requirements and Design Specification. 

This company are making huge changes in the way that the internet is accessible on our mobile phones. They are designing chips to put into satellites to give complete global coverage wherever you are in the world! In Q1 next year they plan to launch their first five satellites.

Duties and Responsibilities:
  • Working closely with System Definition and FPGA/IC Design teams to ensure verification compliant documentation and early identification of specification holes/ambiguities
  • Technical leadership, planning and review of the Verification team activities to meet the group goals 
  • Create advanced verification flows to achieve the highest verification quality, productivity and time-to-market metrics
  • Managing and reviewing Verification Compliance of 3rd party IP or service providers
  • Creating Verification Test Plans
  • Defining - verification strategy - test bench architecture, stimulus, protocol monitors and checkers
  • Running multi-corner Gate Level Simulations to prove physical timing constraints
  • Supporting design debug for Bench Validation activities and ATE ramp to production
Minimum Qualifications:
  • At least 8+ years industry experience, 3+ years of managerial experience
  • Experience verifying large System on Chip designs and CPU verification using C.
  • Experience with DSP, Wireless Communication and networking standards
  • Hands on Design Verification experience using Verilog, System Verilog and UVM, and/or VHDL
  • Strong verification mindset with a clear understanding of verification goals and practices
  • Practical use of scripting languages csh/Tcl/Python/Perl etc
  • Experience using industry standard EDA tools (Cadence, Synopsys, Mentor, Xilinx)
  • Good verbal communication and documentation skills and ability to work with diverse teams
This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands.

On offer is a competitive base + American style share options. You must be prepared and want to work within a start-up environment and embrace the technical challenges that come with that.

Note: Must be a UK resident, Visa sponsorship for Engineers already based in the UK will be granted. Must be able to work onsite in Edinburgh.

For more information on this superb opportunity, please contact Rachel Mason.
Apply now