{"id":145974,"date":"2026-06-12T00:00:00","date_gmt":"2026-06-11T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/digital-asic-design-engineer-472763\/"},"modified":"2026-07-24T14:07:47","modified_gmt":"2026-07-24T13:07:47","slug":"digital-asic-design-engineer-472763","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/digital-asic-design-engineer-472763\/","title":{"rendered":"Digital ASIC Design Engineer"},"content":{"rendered":"<p style=\"border-width: 0px;font-size: var(--artdeco-reset-typography_getFontSize);vertical-align: baseline;background-color: #ffffff;line-height: var(--artdeco-reset-typography_getLineHeight);font-family: -apple-system, system-ui, BlinkMacSystemFont, &#039;Segoe UI&#039;, Roboto, &#039;Helvetica Neue&#039;, &#039;Fira Sans&#039;, Ubuntu, Oxygen, &#039;Oxygen Sans&#039;, Cantarell, &#039;Droid Sans&#039;, &#039;Apple Color Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Symbol&#039;, &#039;Lucida Grande&#039;, Helvetica, Arial, sans-serif;white-space: normal\"><span style=\"font-family: Verdana;font-size: 14px\">An exciting opportunity to work on the latest cutting edge technology in the semiconductor industry.<\/span><\/p>\n<p style=\"border-width: 0px;font-size: var(--artdeco-reset-typography_getFontSize);vertical-align: baseline;background-color: #ffffff;line-height: var(--artdeco-reset-typography_getLineHeight);font-family: -apple-system, system-ui, BlinkMacSystemFont, &#039;Segoe UI&#039;, Roboto, &#039;Helvetica Neue&#039;, &#039;Fira Sans&#039;, Ubuntu, Oxygen, &#039;Oxygen Sans&#039;, Cantarell, &#039;Droid Sans&#039;, &#039;Apple Color Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Symbol&#039;, &#039;Lucida Grande&#039;, Helvetica, Arial, sans-serif;white-space: normal\"><span style=\"font-family: Verdana;font-size: 14px\">In this new role as senior digital design engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, CPU architecture, PCIe protocols and machine learning.<\/span><\/p>\n<p style=\"border-width: 0px;font-size: var(--artdeco-reset-typography_getFontSize);vertical-align: baseline;background-color: #ffffff;line-height: var(--artdeco-reset-typography_getLineHeight);font-family: -apple-system, system-ui, BlinkMacSystemFont, &#039;Segoe UI&#039;, Roboto, &#039;Helvetica Neue&#039;, &#039;Fira Sans&#039;, Ubuntu, Oxygen, &#039;Oxygen Sans&#039;, Cantarell, &#039;Droid Sans&#039;, &#039;Apple Color Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Symbol&#039;, &#039;Lucida Grande&#039;, Helvetica, Arial, sans-serif;white-space: normal\"><span style=\"font-family: Verdana;font-size: 14px\">I am looking to speak with senior digital design engineers &#8211; who have experience of, or an interest in:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Degree in Electronics \/ Microelectronics or similar field<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">5+ years&#8217; experience in ASIC \/ FPGA design projects<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">UVM environments &amp; processes<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">System Verilog for IP \/ SOC design of digital ICs \/ ASIC IP or chips<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Complex ASIC\/FPGA designs &amp; architecture for advanced technology nodes<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">RISC-V \/ CPU \/ GPU knowledge (is a bonus, but not required)<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">PCIe knowledge (also a bonus skill)<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">scripting \/ coding skills &#8211; C\/C++, python etc<\/span><\/li>\n<\/ul>\n<p style=\"border-width: 0px;font-size: var(--artdeco-reset-typography_getFontSize);vertical-align: baseline;background-color: #ffffff;line-height: var(--artdeco-reset-typography_getLineHeight);font-family: -apple-system, system-ui, BlinkMacSystemFont, &#039;Segoe UI&#039;, Roboto, &#039;Helvetica Neue&#039;, &#039;Fira Sans&#039;, Ubuntu, Oxygen, &#039;Oxygen Sans&#039;, Cantarell, &#039;Droid Sans&#039;, &#039;Apple Color Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Symbol&#039;, &#039;Lucida Grande&#039;, Helvetica, Arial, sans-serif;white-space: normal\"><span style=\"font-family: Verdana;font-size: 14px\"><strong><span style=\"border-width: 0px;vertical-align: baseline\">Visa sponsorship and relocation support can be offered if required (dependent on experience\/qualifications)<\/span><\/strong><\/span><\/p>\n<p style=\"border-width: 0px;font-size: var(--artdeco-reset-typography_getFontSize);vertical-align: baseline;background-color: #ffffff;line-height: var(--artdeco-reset-typography_getLineHeight);font-family: -apple-system, system-ui, BlinkMacSystemFont, &#039;Segoe UI&#039;, Roboto, &#039;Helvetica Neue&#039;, &#039;Fira Sans&#039;, Ubuntu, Oxygen, &#039;Oxygen Sans&#039;, Cantarell, &#039;Droid Sans&#039;, &#039;Apple Color Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Emoji&#039;, &#039;Segoe UI Symbol&#039;, &#039;Lucida Grande&#039;, Helvetica, Arial, sans-serif;white-space: normal\"><span style=\"font-family: Verdana;font-size: 14px\"><strong style=\"border-width: 0px;vertical-align: baseline;font-weight: var(--hue-web-font-weight-bold)\">For more information on this role then please contact Jordan Browne at IC Resources.&nbsp;<\/strong><\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>An exciting opportunity to work on the latest cutting edge technology in the semiconductor industry. In this new role as senior digital design engineer you will have the opportunity to contribute to advanced technology nodes, consisting of RISC-V designs, CPU architecture, PCIe protocols and machine learning. I am looking to speak with senior digital design [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[239],"industry":[],"class_list":["post-145974","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Digital ASIC Design Engineer - Spain<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ic-resources.com\/en\/jobs\/digital-asic-design-engineer-472763\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Digital ASIC Design Engineer - Spain\" \/>\n<meta property=\"og:description\" content=\"Apply to Digital ASIC Design Engineer - Barcelona, Spain. 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