{"id":145978,"date":"2026-06-12T00:00:00","date_gmt":"2026-06-11T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-verification-engineer-472767\/"},"modified":"2026-07-25T10:06:25","modified_gmt":"2026-07-25T09:06:25","slug":"senior-verification-engineer-472767","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/senior-verification-engineer-472767\/","title":{"rendered":"Senior Verification Engineer"},"content":{"rendered":"<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">I have an exciting opportunity for a talented Verification Engineer to join an Edinburgh or Newbury based HW Team. This is a bgrowing UK Verification team! As a Verification Engineer you will participate in all aspects of digital verification for complete mixed signal IC developments, work on complex verification systems and contribute towards improvements in verification methodology within the business.<\/span><\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">This is a real chance for you to get heavily involved in cutting-edge projects working in a global organisation.<\/span><\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Responsibilities:<\/span><\/p>\n<ul style=\"margin-top: 0cm;margin-bottom: 0cm\">\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Definition of IC verification plan linking product requirements through to detailed testcases<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Leading teams of verification engineers to deliver thoroughly verified ICs<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Create reliable and reusable testbench for complex subsystems and ICs<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Participate in verification specialist groups and contribute to the digital verification methodology discussions<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Supporting, and where necessary coaching, the verification team to follow, and improve, defined methodology practices<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Hands-on project design\/verification involvement<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Required skills and qualifications<\/span><\/p>\n<ul style=\"margin-top: 0cm;margin-bottom: 0cm\">\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">BEng \/ BSc \/ MEng \/ MSc Degree or equivalent in Electronics\/Computer Science or other related discipline.<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Metric driven verification \u2013 verification planning, requirements extraction \u2013 directed and constrained random verification \u2013 functional and code coverage analysis<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">SystemVerilog \u2013 SVA (SystemVerilog Assertions)<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Testbench design with verification frameworks like UVM\/OVM, e, VMM<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Debugging skills \u2013 RTL \u2013 Testbench, OOP \u2013 Gate level (including SDF)<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Scripting experience with Ruby, sh\/csh, TCL, Make, Perl<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Power aware verification (using CPF\/UPF)<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">This position is based in Edinburgh.<\/span><\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">This is a hybrid remote position and will follow a 2+ day in-office work schedule, with in-office days based on business needs and team preference. You must be based within commutable distance of Edinburgh or Newbury or willing to relocate<\/span><\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">In return, on offer you will a great range of benefits including personal and professional development, a uniquely flat culture and much, much more!<\/span><\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;line-height: normal;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">Contact Jordan Browne for more information.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>I have an exciting opportunity for a talented Verification Engineer to join an Edinburgh or Newbury based HW Team. This is a bgrowing UK Verification team! As a Verification Engineer you will participate in all aspects of digital verification for complete mixed signal IC developments, work on complex verification systems and contribute towards improvements in [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[698],"consultants":[239],"industry":[],"class_list":["post-145978","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior Verification Engineer - Scotland<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ic-resources.com\/en\/jobs\/senior-verification-engineer-472767\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Senior Verification Engineer - Scotland\" \/>\n<meta property=\"og:description\" content=\"Apply to Senior Verification Engineer - Edinburgh, Scotland. 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