{"id":163520,"date":"2026-06-29T00:00:00","date_gmt":"2026-06-28T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/ic-layout-engineer-479693\/"},"modified":"2026-07-25T02:06:06","modified_gmt":"2026-07-25T01:06:06","slug":"ic-layout-engineer-479693","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/ic-layout-engineer-479693\/","title":{"rendered":"IC Layout Engineer"},"content":{"rendered":"<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">This is a new opportunity for an IC Layout Engineer with an expanding Semiconductor company set to revolutionize AI hardware infrastructure. With an office in Southampton, they offer very flexible working arrangements with just a day or so in the office every fortnight.&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Working as a member of an experienced team of Analog IC Design and Layout experts, the IC Layout Engineer will support the physical layout of analog and mixed-signal high-speed integrated circuits; converting schematics into high-quality layouts that meet electrical, matching, parasitic, reliability, and manufacturability requirements. You\u2019ll thrive in this small, high-performing team and really make a tangible impact. You&#8217;ll play a visible role in shaping products, influencing technical direction, and contributing to the growth of an exciting semiconductor business.<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">The successful IC Layout Engineer will have:<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<ul style=\"margin-bottom: 0cm;margin-top: 0px\">\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Strong knowledge of analog and mixed-signal CMOS layout techniques, device matching, floorplanning, routing, DRC\/LVS\/debug, parasitic extraction<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">A good understanding of the best layout practices for advanced semiconductor processes<\/span><\/li>\n<\/ul>\n<ul style=\"margin-bottom: 0cm;margin-top: 0px\">\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Experience with IC layout tools such as&nbsp;Cadence Virtuoso<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Experience running and debugging&nbsp;DRC\/LVS&nbsp;using tools such as Calibre, Assura, Pegasus, or similar<\/span><\/li>\n<li style=\"margin: 0cm 0cm 0cm 0px;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">Desirable would be experience with blocks such as PLLs, ADCs, DACs, SerDes, bandgaps, regulators, amplifiers, oscillators, filters, or high-speed I\/O<\/span><\/li>\n<\/ul>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">&nbsp;<\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-family: Verdana;font-size: 14px\">You can expect a competitive market salary, great colleagues and the convenience of being able to do a lot of work from home. <\/span><\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\">&nbsp;<\/p>\n<p style=\"margin: 0cm;font-size: 12pt;font-family: Aptos, sans-serif\"><span style=\"font-size: 14px;font-family: Verdana\">For more information or to apply, contact Caroline Pye @ IC Resources<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This is a new opportunity for an IC Layout Engineer with an expanding Semiconductor company set to revolutionize AI hardware infrastructure. With an office in Southampton, they offer very flexible working arrangements with just a day or so in the office every fortnight.&nbsp; &nbsp; Working as a member of an experienced team of Analog IC [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709,680],"job_skillset":[685],"consultants":[344],"industry":[],"class_list":["post-163520","jobs","type-jobs","status-publish","hentry","consultants-caroline-pye"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v26.6 (Yoast SEO v27.8) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>IC Layout Engineer - England<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/ic-resources.com\/en\/jobs\/ic-layout-engineer-479693\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"IC Layout Engineer - England\" \/>\n<meta property=\"og:description\" content=\"Apply to IC Layout Engineer - Hampshire, England. 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