{"id":222914,"date":"2026-09-17T00:00:00","date_gmt":"2026-09-16T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/senior-digital-asic-design-engineer-516992\/"},"modified":"2026-10-07T22:07:35","modified_gmt":"2026-10-07T21:07:35","slug":"senior-digital-asic-design-engineer-516992","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/senior-digital-asic-design-engineer-516992\/","title":{"rendered":"Senior Digital ASIC Design Engineer"},"content":{"rendered":"<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">An innovative semiconductor startup developing advanced ASIC technology for next generation medical and neurotechnology applications is looking for a Senior Digital ASIC Design Engineer. Their work combines ultra low power digital design with analogue and mixed signal technology, creating highly integrated solutions for demanding applications.<\/span><\/p>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">They are looking for a Senior Digital Design Engineer to take ownership of the front end digital development of their ASICs. This is a hands on role covering architecture, RTL design, verification and supporting the design through to silicon.<\/span><\/p>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">As a Senior Digital Design Engineer, you will:<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Own the architecture and RTL development of digital control, communication and power management functionality<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Develop clean, synthesizable Verilog\/SystemVerilog for low power mixed signal ASICs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Build and maintain SystemVerilog verification environments, including assertions, coverage and self checking testbenches<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Work closely with analogue and system engineers to define interfaces, registers, clocks and calibration functionality<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Take designs through lint, CDC\/RDC, synthesis and timing analysis, working closely with Physical Design where required<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Support FPGA based prototyping, pre silicon validation and eventual silicon bring up<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">\u2022 Contribute to design reviews, technical documentation and verification planning<\/span><\/li>\n<\/ul>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">Required Experience<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong commercial experience in digital ASIC design and RTL development<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Hands on experience with Verilog and\/or SystemVerilog<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience taking digital designs from specification or architecture through RTL development and synthesis<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Good understanding of digital verification, including testbenches, assertions and functional coverage<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with common front end quality checks such as lint, CDC\/RDC and timing constraints<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience working on mixed signal chips is highly desirable&nbsp;<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The Senior Digital Design Engineer will suit someone who enjoys technical ownership and working across the ASIC development flow rather than being limited to a single stage of the process.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For more information on this role or others then please contact Jordan Browne at IC Resources for more information.&nbsp;<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>An innovative semiconductor startup developing advanced ASIC technology for next generation medical and neurotechnology applications is looking for a Senior Digital ASIC Design Engineer. Their work combines ultra low power digital design with analogue and mixed signal technology, creating highly integrated solutions for demanding applications. They are looking for a Senior Digital Design Engineer to [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[239],"industry":[],"class_list":["post-222914","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.6) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Senior Digital ASIC Design Engineer - England<\/title>\n<meta name=\"description\" content=\"Apply to Senior Digital ASIC Design Engineer - London, England. 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