{"id":236524,"date":"2026-10-05T00:00:00","date_gmt":"2026-10-04T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/principal-physical-design-engineer-524916\/"},"modified":"2026-10-07T22:06:46","modified_gmt":"2026-10-07T21:06:46","slug":"principal-physical-design-engineer-524916","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/principal-physical-design-engineer-524916\/","title":{"rendered":"Principal Physical Design Engineer"},"content":{"rendered":"<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">This client is looking for a Principal Physical Design Engineer to join their semiconductor R&amp;D team in Leuven, working on the physical implementation of complex ASIC and SoC designs.<\/span><\/p>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">This is a hands-on Principal Physical Design Engineer position covering the full RTL-to-GDS flow, with responsibility for implementation, optimisation, timing closure and backend methodology development. The role also offers the opportunity to provide technical guidance and mentoring to other engineers without moving into a formal people management position.<\/span><\/p>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">Key responsibilities<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Lead and execute the complete physical design flow from RTL to GDS, including synthesis, floorplanning, power planning, place &amp; route, clock tree synthesis (CTS), static timing analysis (STA) and physical verification<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Drive optimisation of designs against challenging performance, power and area targets<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Analyse and resolve complex timing and implementation challenges across advanced digital designs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Develop and improve physical design methodologies, flows and automation to improve efficiency and design quality<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Work closely with architecture, digital design and verification teams to identify and resolve implementation issues<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contribute to design and architecture reviews from a physical implementation perspective<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Provide technical guidance and mentoring to other Physical Design Engineers<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Support the adoption and optimisation of EDA tools and backend methodologies<\/span><\/li>\n<\/ul>\n<p class=\"isSelectedEnd\"><span style=\"font-family: Verdana;font-size: 14px\">Position Qualifications<\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Bachelor\u2019s or Master\u2019s degree in Electrical Engineering, Electronics, Microelectronics or a related field<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong experience across the complete RTL-to-GDS flow, with a proven track record of successful tape-outs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong experience with industry-standard EDA tools, with expertise in either Cadence or Synopsys<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong understanding of STA, timing closure and physical implementation methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with low-power design techniques and optimisation<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience providing technical leadership or mentoring within a Physical Design environment<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For more information on this Principal Physical Design Engineer role or others, please contact Jordan Browne at IC Resources.<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This client is looking for a Principal Physical Design Engineer to join their semiconductor R&amp;D team in Leuven, working on the physical implementation of complex ASIC and SoC designs. This is a hands-on Principal Physical Design Engineer position covering the full RTL-to-GDS flow, with responsibility for implementation, optimisation, timing closure and backend methodology development. The [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[718],"consultants":[239],"industry":[],"class_list":["post-236524","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.6) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Principal Physical Design Engineer - Belgium<\/title>\n<meta name=\"description\" content=\"Apply to Principal Physical Design Engineer - Leuven, Belgium. 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