{"id":241747,"date":"2026-09-23T00:00:00","date_gmt":"2026-09-22T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/digital-asic-design-engineer-519613\/"},"modified":"2026-10-18T14:16:47","modified_gmt":"2026-10-18T13:16:47","slug":"digital-asic-design-engineer-519613","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/digital-asic-design-engineer-519613\/","title":{"rendered":"Digital ASIC Design Engineer"},"content":{"rendered":"<p><span style=\"font-family: Verdana;font-size: 14px\">This is a rare opportunity to apply your silicon design expertise to truly cutting-edge technology. Innovation sits at the core of this organisation, which develops foundational IP for market-leading graphics processors used in next-generation mobile, smart, and connected devices.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">As a Digital ASIC Design Engineer, you will play a pivotal role in the design, debug, and optimisation of complex hardware modules, delivering best-in-class performance, power efficiency, and reliability.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You will join a highly skilled engineering team working at the forefront of GPU development. In this role, you will take ownership of sophisticated hardware designs, contribute to architectural decisions, and help drive technical excellence across projects.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>What you\u2019ll do<\/strong><\/span><\/p>\n<ul type=\"disc\">\n<li><span style=\"font-family: Verdana;font-size: 14px\">Collaborate with design, verification, and validation teams to deliver advanced silicon solutions<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Define and document detailed micro-architecture specifications and execution plans aligned with project objectives<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Analyse and optimise complex designs, balancing frequency, area, power, and performance trade-offs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Participate in design reviews, providing clear, constructive, and technically sound feedback<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Maintain and improve the design environment, while tracking, debugging, and resolving design issues<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Plan, schedule, and deliver assigned work packages to agreed timelines<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Stay current with emerging tools, methodologies, and best practices in silicon design<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Mentor graduate engineers and early-career colleagues, supporting their technical development and professional growth<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Experience<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>What you will need to have<\/strong><\/span><\/p>\n<ul>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Strong knowledge of digital IC design techniques and methodologies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Hands-on experience with RTL design at IP or SoC level using SystemVerilog<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Proven ability to optimise designs across performance, power, and area constraints<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with ASIC or FPGA design tools and environments<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Exposure to formal verification or proof methodologies to capture and validate design intent<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Knowledge of CPU, DSP, or FPU architectures, including debug and test strategies<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Proficiency in C, SystemC, C++, Python, Perl, or TCL<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Understanding of verification requirements derived from architectural and functional specifications<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with GPU or CPU design methodologies, including UVM<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\">On offer is a competitive base salary and bonus scheme.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For more information on this role or others then please contact Jordan Browne at IC Resources.&nbsp;<\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>This is a rare opportunity to apply your silicon design expertise to truly cutting-edge technology. Innovation sits at the core of this organisation, which develops foundational IP for market-leading graphics processors used in next-generation mobile, smart, and connected devices. As a Digital ASIC Design Engineer, you will play a pivotal role in the design, debug, [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[239],"industry":[],"class_list":["post-241747","jobs","type-jobs","status-publish","hentry","consultants-jordan-browne"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.6) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>Digital ASIC Design Engineer - England<\/title>\n<meta name=\"description\" content=\"Apply to Digital ASIC Design Engineer - Bristol, England. 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