{"id":245767,"date":"2026-10-20T00:00:00","date_gmt":"2026-10-19T23:00:00","guid":{"rendered":"https:\/\/ic-resources.com\/jobs\/asic-design-engineer-533384\/"},"modified":"2026-10-21T22:13:17","modified_gmt":"2026-10-21T21:13:17","slug":"asic-design-engineer-533384","status":"publish","type":"jobs","link":"https:\/\/ic-resources.com\/en\/jobs\/asic-design-engineer-533384\/","title":{"rendered":"ASIC Design Engineer"},"content":{"rendered":"<p><span style=\"font-family: Verdana;font-size: 14px\">I&#8217;m working with an established global semiconductor company that is growing its ASIC Design team in Bristol, with an opportunity for an RTL Design Engineer to work on the next generation of low-power Wi-Fi SoCs.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The company develops wireless technology used in millions of connected devices worldwide, and this role offers the chance to get involved in the full ASIC design lifecycle, from architecture and RTL development through to integration, verification and tape-out.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">You&#8217;ll be joining an experienced engineering team, working closely with specialists across architecture, verification, software and physical implementation, with plenty of opportunity to take ownership of your designs and contribute to real silicon products.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>The role<\/strong><\/span><\/p>\n<ul type=\"disc\">\n<li><span style=\"font-family: Verdana;font-size: 14px\">RTL design and development for next-generation Wi-Fi SoCs<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">IP and subsystem design, verification and integration<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Working across the ASIC development lifecycle, from specifications through to tape-out<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Collaborating with architecture, verification, DFT and implementation teams<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Supporting synthesis, static timing analysis and design sign-off<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Implementing low-power design techniques to improve performance and efficiency<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Contributing to design reviews, technical documentation and mentoring<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Experience required<\/strong><\/span><\/p>\n<ul type=\"disc\">\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience in ASIC\/SoC RTL Design using SystemVerilog, Verilog or VHDL<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Good understanding of digital IC design, verification and synthesis<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Knowledge of STA, clock-domain crossing, low-power design and DFT<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Familiarity with RTL implementation flows and tools<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Experience with LEC, VCLP or UPF would be beneficial<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Exposure to functional verification and coverage-driven sign-off<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Scripting experience with Python or Tcl in a Linux environment<\/span><\/li>\n<li><span style=\"font-family: Verdana;font-size: 14px\">Degree in Electronics Engineering, Microelectronics or a related subject<\/span><\/li>\n<\/ul>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Bristol location<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">Bristol has one of the strongest semiconductor engineering communities in the UK, with a large number of companies working across silicon design, wireless communications and advanced computing.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">It&#8217;s also a great city to live in, with a lively food and music scene, plenty of green space and easy access to Bath, the Mendips and the South West coast.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">For engineers considering relocation, it offers a good balance of career opportunities and quality of life.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>The opportunity<\/strong><\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">This is a chance to join a well-established international semiconductor company developing high-volume wireless products, with the opportunity to take on technical responsibility and broaden your experience across the ASIC design flow.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">The team is working on new Wi-Fi SoC developments, offering a variety of technical challenges across RTL design, low-power implementation and SoC integration.<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\">UK Based candidates only &#8211; Visa support and relocation within the UK can be supported.&nbsp;<\/span><\/p>\n<p><span style=\"font-family: Verdana;font-size: 14px\"><strong>Please contact Rachel Mason for more information.&nbsp;<\/strong><\/span><\/p>\n","protected":false},"excerpt":{"rendered":"<p>I&#8217;m working with an established global semiconductor company that is growing its ASIC Design team in Bristol, with an opportunity for an RTL Design Engineer to work on the next generation of low-power Wi-Fi SoCs. The company develops wireless technology used in millions of connected devices worldwide, and this role offers the chance to get [&hellip;]<\/p>\n","protected":false},"featured_media":0,"template":"","team-industry":[],"job_sector":[699],"job_expertise":[709],"job_skillset":[692],"consultants":[408],"industry":[],"class_list":["post-245767","jobs","type-jobs","status-publish","hentry","consultants-rachel-mason"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO Premium plugin v28.6 (Yoast SEO v28.7) - https:\/\/yoast.com\/product\/yoast-seo-premium-wordpress\/ -->\n<title>ASIC Design Engineer - England<\/title>\n<meta name=\"description\" content=\"Apply to ASIC Design Engineer - Bristol, England. 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