Analog IC Layout Engineer,
Job ID: 168602
Location: England, UK
Salary: Competitive salary
Job Type: Permanent
Immediately hiring in the London area!
A Semiconductor start up in the sensor market is looking to hire an Analog IC layout Engineer for their design team in the wider London area. In your position as Analog IC Layout Engineer you will be responsible for hand-on block level layout design of a mixed-signal ASIC in 180nm process node as well as AMS verification (DRC, LVS, PVS parasitic extraction...) You will also take charge of the top-level layout integration and IC sign-off for tape-out and interact with the fab team on GDS transfer and acceptance.
You will work closely with analog and digital design on floor-planning, trial layout design, collaborate with CAD, process technology and WLCSP package design if necessary.
The successful Analog IC Layout Engineer is industry qualified and has at least 5 years of experience in Analogue and Mixed-Signal layout including all layout steps, tape-out and GDS transfer
Your skills include:
Cadence Virtuoso Design Framework Experience - Schematic and Layout L/XL
Cadence/Calibre verification methodology and flow (DRC, LVS, Quantus PVS, etc.)
For this opportunity visa cannot be sponsored and applicants with an existing work permit for the UK only will be considered. Salary depends on experience.
For more information and to apply click on APPLY NOW to speak with a member of our team!