DFT Engineer - ASIC
Bristol, England
Permanent
Excellent Salary and Benefits including generous pension scheme and health insurance!
V-172984
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Rachel Mason
ASIC | Verification
Fantastic opportunity for a DFT Engineer to join a market leader in the AI Industry!
I am looking for an experienced DFT Engineer to join my clients Silicon team. You will have a strong focus on quality, an understanding of the importance of production test on the success of a product and some hands-on experience in one or more of the following areas: RTL design, simulations and debugging, synthesis, STA and DFT.
The successful DFT Engineer will be working with the silicon team to define DFT specifications and chip test interface as well as developing and implementing DFT architecture and DFT infrastructure.
Alongside this you will be working with the silicon team to verify DFT features and implement design changes.
Requirements
As a top company my client offer relocation assistance, fantastic benefits, and very good salaries.
For a more detailed discussion and confidential chat please contact Rachel Mason at IC Resources
I am looking for an experienced DFT Engineer to join my clients Silicon team. You will have a strong focus on quality, an understanding of the importance of production test on the success of a product and some hands-on experience in one or more of the following areas: RTL design, simulations and debugging, synthesis, STA and DFT.
The successful DFT Engineer will be working with the silicon team to define DFT specifications and chip test interface as well as developing and implementing DFT architecture and DFT infrastructure.
Alongside this you will be working with the silicon team to verify DFT features and implement design changes.
Requirements
- Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
- Experience on developing DFT specifications and driving DFT architecture and methods for designs
- Solid understanding of design verification methodologies for validating DFT implementation in simulation pre-silicon
- Experience in debugging ATPG patterns, Compressed ATPG patterns, MBIST and JTAG related issues
- Experience with STA constraints development and analysis for DFT modes and SDF simulations
- Experience in silicon bring-up, debug, and validation of DFT features
- A very good knowledge of Digital Integrated Circuits and Systems
- Familiarity with programming languages such as C/C++ and Tcl/Python scripting
As a top company my client offer relocation assistance, fantastic benefits, and very good salaries.
For a more detailed discussion and confidential chat please contact Rachel Mason at IC Resources