Job ID: 166744
Location: Paris, Île-de-France, France, Europe
Salary: Competitive Salary + Benefits + City location!
Job Type: Permanent
NEW DFT Opportunity – Leader in 4G/5G technologies! Paris, France.
This is a superb opportunity for a DFT Engineer (Design for test) to join my client in their HQ in Paris. As the successful DFT Engineer you will be working with a fantastic team and a comprehensive product portfolio which features industry leading low power consumption and 4G/5G broadband and critical IoT applications.
As the DFT Engineer you will be responsible for writing timing constraints, running synthesis and implementing DFT including scan, MBIST and IP testing of part of the companies next generation IC. You will work closely with several teams: Software, Signal processing algorithms, integration and Layout.
To be successful in this role you must have an Engineering degree and a minimum of 4/5 years’ experience. Along with standard DFT methods you must have good experience in Verilog/VHDL. Knowledge of Cadence CLP would be advantageous.
Please Note: You must have French working rights for this role.
For more details and a confidential discussion please contact Rachel Mason at IC Resources or call 0118988 1107