Job ID: 169900
Location: Grenoble, Auvergne-Rhône-Alpes, France, Europe
Salary: Great salary, beautiful location, and extra benefits
Job Type: Permanent
Fantastic new opportunity as Design / Verification Engineer to work for a rapidly growing ASIC design and supply services company, based in the beautiful foothills of the French Alps.
You will be working with an established team of digital designers on exciting mixed ASIC projects. Responsibilities
- Writing block specifications, sub-systems in coordination with circuit architects
- Designing digital blocks, sub-systems
- UVM functional verification for test patterns
- Contribute to the digital design and verification flow.
- Engineering degree (or similar) in microelectronics
- Design and/or functional verification in an UVM environment (SystemVerilog), with the practice of embedded processing (processors, hardware accelerators, algorithms implementation).
- OOP (C++, …), and scripting (python, tcl, …)
- Positive work attitude - desire to learn more and improve - good communications skills
- Fluent English (fluent French too, is a massive bonus!)
- Experience with simulation tools (Questa/Mentor), code verification (Lint, CDC…), design in different languages (SystemVerilog, VHDL, …)
- Mixed simulation.
- Communication interfaces
For more details, please contact Rob Hudson @ IC Resources