Design Verification Engineer, Hampshire

Design Verification Engineer, Farnborough

Job ID: 177161
Location: Hampshire, England, UK
Salary: Competitive salary and other benefits + Remote working
Job Type: Permanent

Digital Verification Engineer – Remote working

I am looking for Digital Verification Engineers of all levels as I have an exciting new opportunity for a leading provider of fingerprint identification technologies. You will play a key role within the business creating state of the art embedded systems by developing and refining their verification strategy. You will be working within a range of markets including payment cards, identification, access control, healthcare and IoT. My client is based in Farnborough but is offering Engineers the option for 100% remote work even after the pandemic, so location is not an issue!

Responsibilities would include:
  • Lead the architecture development of verification environment; interpret requirements, analyse potential solutions, debug and document results.
  • Writing scripts, testbenches, tests; document flows, procedures and results of the verification methodology.
  • Perform design verification with SystemVerilog and UVM, potentially from both a sub-block level and top level.
  • Provide or develop a vision for verification that incorporates early software development and readily translates to the silicon validation phase.
  • Apply creative approaches to achieving functional coverage and ensuring overall design quality. Recommend and evaluate EDA tools that support such processes.
  • Create abstract simulation models for analog and/or sensor components as necessary to improve the fidelity of the digital testbench.
  • Ability to devise, implement and distribute verification processes, flows and methodologies.
  • Ability to create detailed written specifications of verification environment(s).
  • Ability to create detailed verification/test plans.
  • Ability to explain verification concepts at various levels.
  • Ability to verify and debug SoC and Encryption based systems, including mixed signal designs.
  • Experience in writing Verilog and System Verilog, within a UVM-based environment.
For more information on this role or others please contact Jordan Browne at IC-Resources- 01189073075

+44 (0)118 988 1150

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