We support a young innovative semicon company in Dresden with their search for a Digital Verification Engineer (m/f).
As a Digital Verification Engineer you bring:
- a university degree in electrical engineering or similar
- at least 3 years of experience in design verification and good knowledge in UVM and SystemVerilog
As a Digital Verification Engineer you will:
- set up and maintain the verification environment and the behavioral model
- develop test benches and run regressions for coverage analysis
- run formal verification to ensure functional correctness.
If this job as a Digital Verification Engineer attracts your interest and suits your background, please get in contact with Nicole Lamprecht for more information.
