This is an opportunity for a Digital ASIC Verification Engineer to join a leading IC design company based in Western Germany.
Our client is a highly successful, stable and expanding Silicon Design company specialising in high-speed, low power interface technology. They are offering many opportunities within the business in multiple sites across Europe, including an exciting role for a Digital ASIC Verification Engineer in the North Rhine-Westphalia region.
As the ASIC Verification Engineer you will be responsible for verifying high performance mixed-signal communication links.
- Proven industry experience with very good background in Digital ASIC Verification background (System Verilog, UVM, Specman)
- A strong understanding of verification planning and testbench development using the latest methodologies
- Developing directed/constraint-random test generation (UVM)
- Experience working with simulation tools and scripting languages (Perl/Python/Bash),
You will be self-motivated and a strong team-player, with strong sense of ownership and responsibility. Good communication skills in English are ideal with knowledge of German would be a plus.
Get in touch today for details: contact Caroline Pye @ IC Resources com.