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Digital Verification Engineer, Paris


Digital Verification Engineer, Paris


Job ID: 170057
Location: Paris, Île-de-France, France, Europe
Salary: €40,000- €50,000- depending on experience
Job Type: Permanent
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Working for an exciting and leading provider of RF semiconductor chips & modules for 4G, 5G & IoT, we have a key vacancy as Digital Verification Engineer - to be based in Paris.

Within the role, you will be part of the ASIC verification team - having responsibility for the development of verification environments for the validation of RTL for an LTE and/or 5G ASIC.
 
Required experience:
  • C++ / SystemC
  • Good experience of Verilog/VHDL
  • 5-10 years in UVM verification environments and processes
  • Fluent written and spoken English - French is a bonus
Additional / preferred skills
  • Knowledge of telecoms networking/connectivity (LTE) 
  • Knowledge of bus interfaces (AHB, AXI, OCP) 
  • Experience of integrating Validation IP (VIP) 
  • Python/Scons scripting 
  • Running and debugging simulation environments
If you would like to apply or to have a chat in more detail about the role, please contact Rob Hudson @ IC Resources

 


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