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Digital Verification Engineer, Switzerland


Digital Verification Engineer, Neuchâtel


Job ID: 171347
Location: Switzerland, Europe
Salary: Flexible salary and great benefits - depending on experience and seniority level.
Job Type: Permanent


A beautiful, healthy location, and the chance to join a world-leader developing cutting-edge, ultra-low power integrated circuits. Join our client as a Senior Digital IC Verification Engineer.

Located in the French-speaking region of Switzerland, our client’s expertise within low power integrated circuit development spans 40 years. They are now seeking a Senior Digital IC Verification Engineer to join their wireless department, working closely with software and analog / RF teams to strengthen the digital team and verification methodology development. Within the role you will be performing state-of-the-art ultra-low power digital design verification using UVM methodology (System Verilog).

You will need:
  • Master's Degree in related field
  • 5-10 years' professional experience
  • Proven track record in digital verification methodologies of integrated circuits including testbench architecture, script writing, scoreboard and coverage methodology
  • Knowledge of all digital verification steps (RTL, gate level, formal verification)
  • Knowledge of UVM methodology System Verilog and VHDL
  • Verifying SOCs using SystemVerilog, testbenches, checkers, models and tests
  • Experience with HW/SW cosimulation
  • Experience with mixed signal verification (analog/digital/SW)
  • Fluent skills in English, and preferably French too
Preferred / additional requirements:
  • Wireless protocol knowledge (like BLE) 
  • Experience of the Automotive industry 
  • High level modelling (C/SystemC/C++) and knowledge on agile SW methods
  • Solid python skills 
Get in touch today for details: contact Rob Hudson @ IC Resources or call +44 (0)118 988 1153.


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